#ifndef __AQUISITION_C__
#define __AQUISITION_C__
#endif

#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <sys/ipc.h>
#include <sys/shm.h>
#include <sys/ioctl.h>
#include <sys/types.h>

#include <sys/stat.h>
#include <fcntl.h>
#include <errno.h>
#include <unistd.h>

#include "camac.h"
#include "dc_int.h"
#include "daq.h"


short int read_limit[2];
short int threshold[2];

void daq_camac(struct io_control *i_cntl, int camac_flag)
{
    DCCycle dcc;
    short int j = 0;
    short int fadc_module;
    short int sadc_module;
    short int tdc_module;

    /*
     *    Fadc_Station Number of FADC
     */
#include "station.h"
    /*#include "adc_station.h"*/

    fadc_module = sizeof(fadc_station)/sizeof(short int);
    sadc_module = sizeof(sadc_station)/sizeof(short int);
    tdc_module = sizeof(tdc_station)/sizeof(short int);
    
    /* Crate Initialize */
    if (!camac_flag) {
        ioctl(i_cntl->CC_fd, DC_Z, 0);
        ioctl(i_cntl->CC_fd, DC_C, 0);
        
        read_limit[0] = FADC_BLOCK_LENGTH;
        read_limit[1] = FADC_BLOCK_LENGTH/2;
        threshold[0] = 0;
        threshold[1] = FADC_BLOCK_LENGTH/2;
    }
    
    /* Main part */
    else {
        while (i_cntl->graphics) sleep(1);
        i_cntl->new_graph = 1;
        
        for(j = 0; j < fadc_module; j++) {  
            dcc.n = fadc_station[j];
            dcc.a = 0;

            dcc.f = 10;
            ioctl(i_cntl->CC_fd, DC_CYCLE, &dcc);
            dcc.f = 9;
            ioctl(i_cntl->CC_fd, DC_CYCLE, &dcc);
            dcc.f = 25;
            ioctl(i_cntl->CC_fd, DC_CYCLE, &dcc);
        }
        
        for (j = 0; j < sadc_module; j++) {
            dcc.n = sadc_station[j];
            dcc.a = 0;
            
            dcc.f = 24;
            ioctl(i_cntl->CC_fd, DC_CYCLE, &dcc);
            dcc.f = 10;
            ioctl(i_cntl->CC_fd, DC_CYCLE, &dcc);
            dcc.f =  9;
            ioctl(i_cntl->CC_fd, DC_CYCLE, &dcc);
            dcc.f = 26;
            ioctl(i_cntl->CC_fd, DC_CYCLE, &dcc);
        }

        for (j = 0; j < tdc_module; j++) {
            dcc.n = tdc_station[j];
            dcc.a = 0;
            
            dcc.f = 24;
            ioctl(i_cntl->CC_fd, DC_CYCLE, &dcc);
            dcc.f = 10;
            ioctl(i_cntl->CC_fd, DC_CYCLE, &dcc);
            dcc.f =  9;
            ioctl(i_cntl->CC_fd, DC_CYCLE, &dcc);
            dcc.f = 26;
            ioctl(i_cntl->CC_fd, DC_CYCLE, &dcc);
        }

            /* test LAM */
        for(j = 0; j < fadc_module; j++) { 
            dcc.n = fadc_station[j];
            dcc.f = 8;
            while (i_cntl->status) {
                ioctl(i_cntl->CC_fd, DC_CYCLE, &dcc);
                
                if (dcc.stat == 1) {
                    printf("dcc.stat == %d\n", dcc.stat);
                    printf("DC_Q == %d\n", DC_Q);
                }
                
                if (dcc.stat & DC_Q)
                    break;
            }
        }
    
        for(j = 0; j < sadc_module; j++) { 
            dcc.n = sadc_station[j];
            dcc.f = 8;
            while (i_cntl->status) {
                ioctl(i_cntl->CC_fd, DC_CYCLE, &dcc);
                
                if (dcc.stat == 1) {
                    printf("dcc.stat == %d\n", dcc.stat);
                    printf("DC_Q == %d\n", DC_Q);
                }
                
                if (dcc.stat & DC_Q)
                    break;
            }
        }
        
        for(j = 0; j < tdc_module; j++) { 
            dcc.n = tdc_station[j];
            dcc.f = 8;
            while (i_cntl->status) {
                ioctl(i_cntl->CC_fd, DC_CYCLE, &dcc);
                
                if (dcc.stat == 1) {
                    printf("dcc.stat == %d\n", dcc.stat);
                    printf("DC_Q == %d\n", DC_Q);
                }
                
                if (dcc.stat & DC_Q)
                    break;
            }
        }
    }
}